module decode

title '8031 address decoder'

decode device 'P26V12';

!wrt pin 1 ;
!rd pin 2;
!psen pin 3;
ale pin 4;
a13 pin 5;
a14 pin 6;
a15 pin 8;

!read pin 15;
!ramcs pin 16;
!romcs pin 17;

!iowrt pin 18;
!iord pin 19;
!dtmf_en pin 20;
!dtmf_rd pin 24;
!dtmf_en2 pin 25;

!rd543 pin 22;
!wr543 pin 23;

addr = [a15,a14,a13];

"
" definitions
"

c,z,x  =  .c.,.z.,.x. ;
h,l    =  1,0         ;

equations

" Overlap program and data space

read = rd # psen;

" ROM at 0000, RAM at 2000

romcs = (addr == 0);
ramcs = (addr == 1);

" Misc. I/O read at 4000, DTMF decoder read at 6000,
" Misc. I/O write at 4000

iord = (addr == 2) & (rd # psen);
iowrt = (addr == 2) & wrt;

" All reads from external asynchronous circuitry are done through
" '373 type latches whose contents are held while the read strobe
" is low; this ensures stable data when the 8031 requires it.  But
" the DTMF decoder outputs must be enabled first, and once enabled
" there is no guarantee that they won't change again.  So we must
" enable the appropriate DTMF decoder output early, then latch the
" data as usual when RD* asserts.  First, we compute a qualify term
" which asserts when the appropriate address appears.

dtmf_en2 = (addr == 3) & ale                      " set
         # dtmf_en2 & !wrt & !rd & !psen;         " hold

" Now we output-enable the DTMF decoders based on that qualify
" term being set and ALE being low.  When the read strobe comes,
" one PAL delay later the '373 will grab the data, whereas two
" two PAL delays, one '139 delay and one '04 delay later, the
" output enable will go away.  This provides enough hold time
" for the '373.

" Timing spec for 12MHz 8031 says minimum 200ns ALE low to RD*
" asserted.  This is enough for the 50ns enable time of the
" DTMF decoder and the other delays.

dtmf_en = !ale & dtmf_en2;

" Finally the ordinary read decode for the '373.

dtmf_rd = (addr == 3) & rd;

" Enable 543 in read direction whenever misc. I/O or DTMF
" decoders are being read.

rd543 = ( (addr == 2) # (addr == 3) ) & (rd # psen);

" 543 latches write data when write strobe goes away.  In
" order to provide data hold time until the I/O write address
" decoder output deasserts, keep the 543 write data buffer
" enabled until next ALE pulse.

wr543 = ((addr == 2) & wrt)            " set
      # (wr543 & !ale);                " hold

end decode